Part Number Hot Search : 
2SJ105 FP7487 BAV10 D8155HC 2SC4387 AR5010 00111 SC5094
Product Description
Full Text Search
 

To Download PSMN2R0-30PL Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
Rev. 01 -- 24 June 2009 Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in TO220 package qualified to 175 C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.
1.2 Features and benefits
High efficiency due to low switching and conduction losses Suitable for logic level gate drive sources
1.3 Applications
DC-to-DC converters Load switiching Motor control Server power supplies
1.4 Quick reference data
Table 1. VDS ID Ptot Quick reference Conditions Tmb = 25 C; VGS = 10 V; see Figure 1 Tmb = 25 C; see Figure 2 [1] Min Typ Max 30 100 211 Unit V A W drain-source voltage Tj 25 C; Tj 175 C drain current total power dissipation gate-drain charge total gate charge Symbol Parameter
Dynamic characteristics QGD QG(tot) VGS = 4.5 V; ID = 25 A; VDS = 12 V; see Figure 13; see Figure 14 VGS = 4.5 V; ID = 15 A; Tj = 25 C VGS = 10 V; ID = 15 A; Tj = 25 C; see Figure 12
[1] [2] Continuous current is limited by package. Measured 3 mm from package.
-
16 55
-
nC nC
Static characteristics RDSon drain-source on-state resistance [2] 2 1.7 2.8 2.1 m m
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
2. Pinning information
Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
123
SOT78 (TO-220AB)
3. Ordering information
Table 3. Ordering information Package Name PSMN2R0-30PL TO-220AB Description Version plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78 TO-220AB Type number
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
2 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
4. Limiting values
Table 4. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM EDS(AL)S Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 C tp 10 s; pulsed; Tmb = 25 C [1] VGS = 10 V; Tmb = 100 C; see Figure 1 VGS = 10 V; Tmb = 25 C; see Figure 1 tp 10 s; pulsed; Tmb = 25 C; see Figure 3 Tmb = 25 C; see Figure 2 [1] [1] Conditions Tj 25 C; Tj 175 C Tj 25 C; Tj 175 C; RGS = 20 k Min -20 -55 -55 Max 30 30 20 100 100 943 211 175 175 100 943 555 Unit V V V A A A W C C A A mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness non-repetitive VGS = 10 V; Tj(init) = 25 C; ID = 100 A; Vsup 30 V; drain-source avalanche RGS = 50 ; unclamped energy
[1]
Continuous current is limited by package.
250 ID (A) 200
003aad248
120 Pder (%) 80
03aa16
150
100
(1)
40
50
0 0 50 100 150 Tmb (C) 200
0 0 50 100 150 Tmb (C) 200
Fig 1.
Normalized continuous drain current as a function of mounting base temperature
Fig 2.
Normalized total power dissipation as a function of mounting base temperature
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
3 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
104 ID (A) 103 Limit RDSon = VDS / ID 10 s
003aad295
102
100 s
(1)
10
1 ms DC 10 ms 100 ms
1 10-1
1
10
VDS (V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ 0.41 Max 0.71 Unit K/W thermal resistance from see Figure 4 junction to mounting base
1 Zth (j-mb) (K/W) 10-1
003aad247
= 0.5
0.2 0.1 0.05
10-2
0.02
P = tp T
10-3 single shot
tp t T
10
-4
10-6
10-5
10-4
10-3
10-2
10-1
1 tp (s)
10
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
4 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
6. Characteristics
Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 250 A; VGS = 0 V; Tj = 25 C ID = 250 A; VGS = 0 V; Tj = -55 C ID = 1 mA; VDS = VGS; Tj = 25 C; see Figure 9; see Figure 10 ID = 1 mA; VDS = VGS; Tj = 175 C; see Figure 10 ID = 1 mA; VDS = VGS; Tj = -55 C; see Figure 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 30 V; VGS = 0 V; Tj = 25 C VDS = 30 V; VGS = 0 V; Tj = 125 C VGS = 16 V; VDS = 0 V; Tj = 25 C VGS = -16 V; VDS = 0 V; Tj = 25 C VGS = 4.5 V; ID = 15 A; Tj = 25 C VGS = 10 V; ID = 15 A; Tj = 100 C; see Figure 11 VGS = 10 V; ID = 15 A; Tj = 25 C; see Figure 12 RG QG(tot) gate resistance total gate charge f = 1 MHz ID = 25 A; VDS = 12 V; VGS = 10 V; see Figure 13; see Figure 14 ID = 25 A; VDS = 12 V; VGS = 4.5 V; see Figure 13; see Figure 14 QGS QGS(th) QGS(th-pl) QGD VGS(pl) Ciss Coss Crss td(on) tr td(off) tf gate-source charge pre-threshold gate-source charge post-threshold gate-source charge gate-drain charge gate-source plateau voltage input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time VDS = 12 V; RL = 0.5 ; VGS = 4.5 V; RG(ext) = 4.7 VDS = 12 V; see Figure 13; see Figure 14 VDS = 12 V; VGS = 0 V; f = 1 MHz; Tj = 25 C; see Figure 15 ID = 25 A; VDS = 12 V; VGS = 4.5 V; see Figure 13; see Figure 14 Dynamic characteristics 117 55 17 11 6 16 2.6 6810 1410 650 63 125 111 59 nC nC nC nC nC nC V pF pF pF ns ns ns ns [2] Min 30 27 1.3 0.5 Typ 1.7 2 1.7 0.78 Max 2.15 2.45 3 70 100 100 2.8 3 2.1 Unit V V V V V A A nA nA m m m
Static characteristics
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
5 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
Table 6. Symbol VSD trr Qr
[1] [2]
Characteristics ...continued Parameter source-drain voltage reverse recovery time recovered charge Conditions IS = 25 A; VGS = 0 V; Tj = 25 C; see Figure 16 IS = 20 A; dIS/dt = -100 A/s; VGS = 0 V; VDS = 30 V Min Typ 0.76 49 66 Max 1.2 Unit V ns nC
Source-drain diode
Tested to JEDEC standards where applicable. Measured 3 mm from package.
100 ID (A) 80 10 3.5 60 3 5 4
003aad249
100 ID (A) 80 Tj = 175 C 60 25 C
003aad254
40
40
20
VGS (V) =2.5 V
20
0 0 0.5 1 1.5 VDS (V) 2
0 0 1 2 3 4 VGS (V) 5
Fig 5.
Output characteristics: drain current as a function of drain-source voltage; typical values
003aad257
Fig 6.
Transfer characteristics: drain current as a function of gate-source voltage; typical values
8
003aad251
220 gfs (S) 165
RDSon (m) 6
110
4
55
2
0 0 25 50 75 ID (A) 100
0 0 5 10 VGS (V) 15
Fig 7.
Forward transconductance as a function of drain current; typical values
Fig 8.
Drain source on-state resistance as a function of gate-source voltage; typical values
(c) NXP B.V. 2009. All rights reserved.
PSMN2R0-30PL_1
Product data sheet
Rev. 01 -- 24 June 2009
6 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
10-1 ID (A) 10-2 min 10-3 typ
003aab271
3 VGS (th) (V)
003a a c982
max
max
2 typ min 1
10-4
10-5
10-6 0 1 2 VGS (V) 3
0 -60
0
60
120
Tj (C)
180
Fig 9.
Sub-threshold drain current as a function of gate-source voltage
2
03aa27
Fig 10. Gate-source threshold voltage as a function of junction temperature
5 RDSon (m) 4 3 3.5 4 3 5 2 VGS (V) =10 V
003aad250
a 1.5
1
0.5 1
0 -60
0 0 60 120 Tj (C) 180 0 20 40 60 80 ID (A) 100
Fig 11. Normalized drain-source on-state resistance factor as a function of junction temperature
Fig 12. Drain-source on-state resistance as a function of drain current; typical values
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
7 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
VDS ID VGS(pl)
10 VGS (V) 8 VDS = 12V 6
003aad255
VGS(th) VGS QGS1 QGS2 QGD QG(tot)
003aaa508
4
QGS
2
Fig 13. Gate charge waveform definitions
0 0 30 60 90 QG (nC) 120
Fig 14. Gate-source voltage as a function of gate charge; typical values
104
003aad253
100 IS (A) 80 Tj = 175 C 60
003aad256
Ciss C (pF)
10
3
Coss Crss
40
25 C
20
102 10-1
1
10
VDS (V)
102
0 0 0.5 1 1.5 VSD (V) 2
Fig 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
Fig 16. Source current as a function of source-drain voltage; typical values
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
8 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
12000 C (pF) 9000
003aad252
Ciss
Crss 6000
3000 0 2.5 5 7.5 VGS (V) 10
Fig 17. Input and reverse transfer capacitances as a function of gate-source voltage; typical values
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
9 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78
E p
A A1 q
D1
mounting base
D
L1(1)
L2(1) Q
L
b1(2) (3x) b2(2) (2x)
1 2 3
b(3x) e e
c
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.7 4.1 A1 1.40 1.25 b 0.9 0.6 b1(2) 1.6 1.0 b2(2) 1.3 1.0 c 0.7 0.4 D 16.0 15.2 D1 6.6 5.9 E 10.3 9.7 e 2.54 L 15.0 12.8 L1(1) 3.30 2.79 L2(1) max. 3.0 p 3.8 3.5 q 3.0 2.7 Q 2.6 2.2
Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC 3-lead TO-220AB JEITA SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13
Fig 18. Package outline SOT78 (TO-220AB)
PSMN2R0-30PL_1 (c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
10 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
8. Revision history
Table 7. Revision history Release date 20090624 Data sheet status Product data sheet Change notice Supersedes Document ID PSMN2R0-30PL_1
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
11 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
9. Legal information
9.1 Data sheet status
Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
9.3
Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS -- is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN2R0-30PL_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 24 June 2009
12 of 13
NXP Semiconductors
PSMN2R0-30PL
N-channel 30 V 2.1 m logic level MOSFET
11. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 24 June 2009 Document identifier: PSMN2R0-30PL_1


▲Up To Search▲   

 
Price & Availability of PSMN2R0-30PL

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X